A memory cell has been proposed that includes a variable resistance element of which the resistance is changed by voltage application. The memory cell is provided between a bit-line and a word-line. Applying some voltage to a selected bit-line and a selected word-line, a selected voltage is applied to the variable resistance element.
Unfortunately, according to the state (resistance) of the variable resistance element connected to the selected bit-line BL, the voltage of the selected bit-line BL changes. Therefore, the sufficient voltage may not be applied to the selected bit-line BL, and thus the resistance of the variable resistance element may remain unchanged.